SPDIF

History

Since the early 80's, a step towards digital audio has been set by the introduction of the Compact Disc player. In the beginning, those signals stayed inside the set, and were converted to analog signals before leaving the cabinet. A new trend is to keep signals into the digital domain as long as possible, because this is the only way to keep the signal quality. To make this possible different devices must be able communicate with one another within the digital domain. Several interfaces exist to perform such tasks, from which one has grown to the audio standard worldwide: IEC958 1989-03 (consumer Part) from the EBU. In Japan an equivalent EIAJ CP-340 1987-9 is standard.

Characteristics

Standard IEC958 "Digital audio interface" from EBU (European Broadcasting Union) details:

Physical connection:

The interface

IEC958 is a newer standard which supersedes AES/EBU and also S-PDIF. The S/PDIF interface (IEC-958) is a 'consumer' version of the AES/EBU-interface. The two formats are quite compatible with each other, differing only in the subcode information and connector. The professional format subcode contains ASCII strings for source and destination identification, whereas the commercial format carries the SCMS.

Here is a short comparision table of AES/EBU and S/PDIF interfaces:

                          AES/EBU              S/PDIF (IEC-958)

Cabling                   110 ohm shileded TP  75 ohm coaxial or fiber
Connector                 3-pin XLR            RCA (or BNC)
Signal level              3..10V               0.5..1V
Modulation                biphase-mark-code    biphase-mark-code
Subcode information       ASCII ID text        SCMS copy protection info
Max. Resolution           24 bits              20 bits (24 bit optional)

Both S/PDIF and AES/EBU can, and do transfer 24 bit words. In AES/EBU, the last 4 bits have a defined usage, so if anyone puts audio in there, it has to go to something that doesn't expect the standard specifies. But in S/PDIF, there's nothing that says what you have to use the bits for, so filling them all up with audio is acceptable. Typical S/PDIF equipments only use 16 or 20 bit resolutions. While many equipments use more than 16 bits in internal processing, it's not unusual for the output to be limited to 16 bits.

AES/EBU-interface uses the well known symmetrical connections with transformer isolation and an output impedance of 110 ohm. The signal-level of this interface is reasonably higher than in the consumer version (3...10 volts).

S/PDIF signals

The signal on the digital output of a CD-player looks like almost perfect sine-wave, with an amplitude of 500 mVtt and a frequency of almost 3 MHz.

For each sample, two 32-bit words are transmitted, which results in a bit-rate of:

    2.8224 Mbit/s  (44.1 kHz samplingrate, CD, DAT)
    3.072  Mbit/s  (48 kHz sampling rate, DAT)
    2.048  Mbit/s  (32 kHz sampling rate, for satellite purposes)
The output impedance is standard 75 ohm, so ordinary coaxial cable designed for video applications can be used. The minimal input level of S/PDIF interface is 200 mVtt which allows some cable losses. There is no real need for special quality cable as long as the cable is made of 75 ohm coaxial cable (a good video accessory cable works also as good S/PDIF cable).

The Coding Format

The digital signal is coded using the 'biphase-mark-code' (BMC), which is a kind of phase-modulation. In this system, two zero-crossings of the signal mean a logical 1 and one zero-crossing means a logical 0.

                _   _   _   _   _   _   _   _   _   _   _   _
               | | | | | | | | | | | | | | | | | | | | | | | |
clock   0 ___ _| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_| |_

                ___         _______     ___         ___
               |   |       |       |   |   |       |   |
data    0 ___ _|   |_______|       |___|   |_______|   |___
signal           1   0   0   1   1   0   1   0   0   1   0

                _   ___     _   _   ___   _     ___   _
Biphase        | | |   |   | | | | |   | | |   |   | | |
Mark    0 ___  | | |   |   | | | | |   | | |   |   | | |
signal         | | |   |   | | | | |   | | |   |   | | |
              _| |_|   |___| |_| |_|   |_| |___|   |_| |___

cells           1 0 1 1 0 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 0
The frequency of the clock if twice the bitrate. Every bit of the original data is represented as two logical states, which, together, form a cell. The length of a cel ('time-slot') is equal to the length of a databit. The logical level at the start of a bit is always inverted to the level at the end of the previous bit. The level at the end of a bit is equal (a 0 transmitted) or inverted (a 1 transmitted) to the start of that bit.

The first 4 bits of a 32-bit word (bits 0 through 3) form a preamble which takes care of synchronisation. This sync-pattern doesn't actually carry any data, but only equals four databits in length. It also doesn't use the BMC, so bit patterns which include more than two 0's or 1's in a row can occur (in fact, they always do).

There are 3 different sync-patterns, but they can appear in different forms, depending on the last cell of the previous 32-bit word (parity):

   Preamble    cell-order         cell-order
       (last cell "0")    (last cell "1")
   ----------------------------------------------
   "B"         11101000           00010111
   "M"         11100010           00011101
   "W"         11100100           00011011

Preamble B: Marks a word containing data for channel A (left)
    at the start of the data-block.

Preamble M: Marks a word with data for channel A that isn't
    at the start of the data-block.

Preamble W: Marks a word containing data for channel B.
    (right, for stereo). When using more than 2
    channels, this could also be any other channel
    (except for A).

Word and Block Formats

Every sample is transmitted as a 32-bit word (subframe). These bits are used as follows:

   bits           meaning
   ----------------------------------------------------------
   0-3            Preamble (see above; special structure)

   4-7            Auxillary-audio-databits

   8-27           Sample
  (A 24-bit sample can be used (using bits 4-27).
   A CD-player uses only 16 bits, so only bits
   13 (LSB) to 27 (MSB) are used. Bits 4-12 are
   set to 0).

   28             Validity
  (When this bit is set, the sample should not
   be used by the receiver. A CD-player uses
   the 'error-flag' to set this bit).

   29             Subcode-data

   30             Channel-status-information

   31             Parity (bit 0-3 are not included)
The number of subframes that are used depends on the number of channels that is transmitted. A CD-player uses Channels A and B (left/right) and so each frame contains two subframes. A block contains 192 frames and starts with a preamble "B":
"M" Ch.1 "W" Ch.2 "B" Ch.1 "W" Ch.2 "M" Ch.1 "W" Ch.2 "M" ...

|                ||_ sub __|_ sub _||                |
|                ||                ||                |
|__ Frame 191 ___||__ Frame   0 ___||__ Frame  1 ____|

  |
             block-start

Channelstatus and subcode information

In each block, 384 bits of channelstatus and subcode info are transmitted. The Channel-status bits are equal for both subframes, so actually only 192 useful bits are transmitted:

   bit            meaning
   -------------------------------------------------------------
   0-3            controlbits:

  bit 0: is set during 4 channel transmission.
  bit 1: 0 (reserved)
  bit 2: copy-protection. Copying is allowed
 when this bit is set.
                  bit 3: is set when pre-emphasis is used.

   4-7            0 (reserved)

   9-15           catagory-code:

  0 = common 2-channel format
  1 = 2-channel CD-format
      (set by a CD-player when a subcode is
       transmitted)
                  2 = 2-channel PCM-encoder-decoder format

                  others are not used

   19-191         0 (reserved)
The subcode-bits can be used by the manufacturer at will. They are used in blocks of 1176 bits before which a sync-word of 16 "0"-bits is transmitted

Electrical Interface

The electrical interface for S/PDIF signals can be either 75 ohm coaxial cable or optical fiber (usually called Toslink). Usually consumer models use that coaxial cable interface and semiprofessional/professional equipments use optical interface. The electrical signal in the coaxial cable is about 500mVtt.


Converting between AES/EBU and S/PDIF interfaces

There are differences in the electrical characteristics of AES/EBU and S/PDIF interfaces:

You can convert one electrical interface to another with a small amount of off-the-shelf hardware and a little time as you can see in the circuit below.

But the protocol used in AES/EBU and S/PDIF is not exactly the same and that can cause sometimes problems. The basic data format of AES and S/P-DIF are identical. There is a bit in the channel status frame that tells which is which. Depending upon the setting of that bit, some bits have different meanings. For example, the bits used to describe de-emphasis in the AES/EBU protocol overlap the bits used to implement the SCMS protocol in S/P-DIF land.

The big problem comes in the fact that MANY products out there are VERY picky about what they see in the bits, and even though a given signal may fall within the letter of the standard, some equipment will absolutely refuse to talk to it. Many equipments are reasonably flexible and tolerant of slight foos in the signal so the simple converters cna work on those. But a simple converter that works fine with one piece will as likely not work with another.

What are different types of IEC 958-interface

There are 2 implementations of IEC 958: consumer and professional. Those are referred in standard as IEC958 Types I and II. IEC958 professional format is same as AES/EBU but is carried over same type of coaxial or optical interface as consumer S/PDIF. IEC958 consumer format is the S/PDIF format used in CD-players. You can put an S-PDIF data stream on an AES/EBU physical balanced cable, or vice versa, and still have it be valid IEC958 data. Professional and consumer formats (Types I and II) differ only in the subcode information. In order to do track indexing, you must have a consumer format data stream (ie. an S/PDIF style data).

Jitter specifications of AES/EBU interface

The AES/EBU standard for serial digital audio uses typically 163 ns clock rate and allows up to +-20 ns of jitter in the signal. This peaks to peak value of 40 ns is aroun 1/4 of the unit interval. D/A conversion clock jitter requirements are considrably tighter. A draft AES/EBU standard specifies the D/A converter clock at 1 ns jitte; however, a theoretical value for 16-bit audio could be as small as 0.1 nsec. Small jitter D/A conversion is implemented by using separate PLL clocks for data recover and DAC and by using a buffering between data recovery and DAC.

Conversion circuits

Here are some AES/EBU and S/PDIF circuit collected from various sources. The following circuit will only convert the signal levels, not other protocol details.

AES/EBU to S/PDIF signal level converter

AES out:   2-------330 ohm-----+-------------   SPDIF in
                               |
           3--+              91 ohm
              |                |
           1--+------+---------+-------------
                     |
                     -
                ground

The idea for this circuit is taken from articles posted to Usenet News.

SPDIF to AES

                                           _
                  + 5 volt                | \
SPDIF out:          |                   +-|  O-+
                    _                   | |_/  |
              diode ^  +-4,7k-+     _   |  _   |
       10 u (+)     |  |      |    | \  | | \  |      100 n
O--+--+-||-+--------+--+--IC--+--+-|  O-+-|  O-+-120 r-||-+----+-- 2
   |  |    |        |         |  | |_/    |_/             |    |
   |  +-||-+ 100n   _       2,2k |                       1 k   |
  75r               ^ diode   |  |     IC                 |    |   AES in
   |                |        --- |                       ---   |
  ---              ---           |       _                    220r
                                 |      | \           100 n    |
                                 +--+---|  O---+--120 r-||-+---+--- 3
 Diode = 1N914 or 1N4148            |   |_/    |           |
                                    |    _     |         1 k   +--- 1
                                    |   | \    |           |   |
    IC = 74HC04 or CMOS 4049        +---|  O---+          --- ---
                                        |_/
The idea for this circuit is taken from articles posted to Usenet News.

S/PDIF output buffer circuit

                                                          S/PDIF output
                                                          (RCA or BNC)
                            |\ 
TTL level signal -----+-----| O-----680R--+---------+    +------- center pin
                      |     |/            |         |    |
                      |                   |          )||(
                      |     |\            |          )||(
                      +-----| O-----680R--+          )||(
                            |/            |          )||(
                                        100R        |    |
                          74HC04          |         |    +------- ground
                                          +----+----+ T1
                                               |
                                              ---
Idea for this circuit is taken from A digital Output for the CD720 web page. The transformer T1 is high quality 1:1 pulse transformer (can be salvaged from old broken network interface card or similar source).

Another S/PDIF output circuit


                            |\
                      +-----| O-----------+
                      |     |/            |               S/PDIF output
                      |                   |  100nF        (RCA or BNC)
                      |     |\            |   ||      T1  
TTL level signal -----+-----| O-----------+---||----+    +-------+--75R--- center pin
                      |     |/            |   ||    |    |       |
                      |                   |          )|| |       | 
                      |     |\            |     15   )||(  3    220R
                      +-----| O-----------+    turns )||( turns  |
                      |     |/            |          )|| |       |
                      |                   |         |    |       | 
                      |     |\04          |         |    +-------+-------- ground
                      +-----| 0-----------+         |   
                            |/                     ---
   
                          74HCU04                     

This circuit is part of circuit "Splitter for S/PDIF coax/optical output" by T. Giesberts from Elektor Electronics magazine July/August 1995 pages 78-79. The transformer T1 is made to G2.3-FT12 ferrite ring core. Primary coil is 15 turns of 0.5 mm diameter enamelled copper wire and secondary is 3 turns of 0.5 mm diameter enamelled copper wire. The circuit in the magazine had 3 outputs. The teo extra output were made by adding two more output coils to T1 and the output resistors.

S/PDIF coax input circuit


                                   +----10K--+                       
                      10 nF        |         |
                       ||          |    |\   |        |\
S/PDIF input ------+---||----100R--+----| O--+---+----| O----- TTL out
                   |   ||               |/       |    |/
                  75R                           10K
                   |                 74HCU04     |
                  ---                           ---
This circuit is part of circuit "Splitter for S/PDIF coax/optical output" by T. Giesberts from Elektor Electronics magazine July/August 1995 pages 78-79.

Who makes AES/EBU digital audio transceiver chips ?

DSP FAQ mentions that Sony, Crystal Semiconductor, Motorola and Yamaha have all AES/EBU tranceiver chips available. DSP FAQ contain more information about AES/EBU chips at http://tjev.tel.etf.hr/josip/DSP/FAQ/42.html. Same companies which have AES/EBU chips have also SPDIF chips and some chips can handle both formats.

Information sources


Tomi Engdahl <Tomi.Engdahl@iki.fi>